|
CLK |
Input |
Core clock signal(4x sample clock) |
|
Cen |
Input |
Synchronous enable signal.
When LOW the core ignores all its inputs and all its outputs
must be ignored. |
|
enable[5:0] |
Input |
RF band enable signals. Each bit controls two streams (path A and path B).
|
|
fftD[] |
Input |
Input of FFT, Multiple samples in parallel, one for each stream. The
samples shall be clocked in on the sample clock.
|
|
fftDstart |
Input |
HIGH pulse clocked on the sample clock indicates the initial 0 sample of
the 128-sample frame of fftD |
|
fftQ[ ] |
Output |
Output of the FFT, multiple samples in parallel. Each stream is output contiguously on sequential sample clocks
|
|
fftQstart |
Output |
HIGH pulse on sample clock marks the first word of fftQ output (n = 0, samples 0..15) for the stream |
|
fftQstream[3:0] |
Output |
The value between 0 and 11 indicates the stream number |
|
ifftD [ ] |
Input |
Input of the IFFT, Multiple samples in parallel. Each stream is clocked in
put contiguously on sequential sample clocks.
|
|
fftDstart |
Input |
HIGH pulse clocked on the sample clock indicates the start of the 128
sample frame (n = 0, samples 0..15) for the stream |
|
fftDstream[3:0] |
Input |
The value between 0 and 11 indicates the stream number |
|
fftQstart |
Output |
HIGH pulse on the sample clock indicates the initial 0 sample of the 128 sample frame of fftD path A streams |
|
fftQ[ ] |
Output |
Output of IFFT, 12 samples in parallel, one for each stream. The samples shall be clocked on sample clock.
|
