|
CLK |
Input |
Core clock signal |
|
abort |
Input |
HIGH level synchronously resets the core |
|
rstb |
Input |
LOW level asynchronously resets the core |
|
cen |
Input |
Clock enable |
|
mode |
Input |
LOW level for compression/encryption, HIGH for decryption/decompression operation |
|
CDbypass |
Input |
HIGH level indicates a bypass of the compression/decompression function |
|
EDbypass |
Input |
HIGH level indicates a bypass of the encryption/decryption function |
|
estimate |
Input |
HIGH level indicates suppression of the compressed data (Cout) |
|
Cin[31:0] |
Input |
Input Data bus for compression/encryption |
|
CinValid |
Input |
Data on Cin is valid |
|
CinReady |
Output |
Core is ready to accept data on Cin |
|
Cout[7:0] |
Output |
Output Data bus for results of compression/encryption |
|
CoutReady |
Input |
Core can drive data on Cout |
|
CoutValid |
Output |
Data on Cout is valid |
|
Din[7:0] |
Input |
Input data bus for decryption/decompression |
|
DinValid |
Input |
Data on Din is valid |
|
DinReady |
Output |
Core is ready to accept data on Din |
|
Dout[31:0] |
Output |
Output data bus for results of decryption/decompression |
|
DoutReady |
Input |
Core can drive data on Dout |
|
DoutValid |
Output |
Data on Dout is valid |
|
BlkSize[23:0] |
Input |
Input data length in bytes minus 1 |
|
CmpSize[24:0] |
Output |
Output data length in bytes minus 1 |
|
start |
Input |
A HIGH pulse starts the new block |
|
done |
Output |
A HIGH pulse indicates the completion of the block processing |
|
active |
Output |
A HIGH level indicates the core is busy processing the block |
|
K1[255:0] |
Input |
128/256-bit AES key. 128-bit key resides in the MSB of this port. |
|
K2[255:0] |
Input |
128/256-bit tweak key (K2). 128-bit key resides in the MSB of this port. |
|
key256 |
Input |
When HIGH, the K1 and K2 are 256-bit wide. When low, the keys are 128-bit wide. |
|
IV[127:0] |
Input |
Initial counter value (location) |
|
MEM |
Input |
Memory Interface |
