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General Description |
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Rivest-Shamir-Adelman (RSA) is a public-key cryptographic technology that uses the mathematics of so called “finite field exponentiation”. |
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The operations necessary for the RSA cannot be efficiently implemented on an embedded CPU, however, typically requiring many seconds of the CPU time for signature verification. |
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RSA1-E implements by far the most time-consuming operation of the RSA cryptography: so called “exponentiation” to enable low-power operation of the battery-powered devices. |
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The design is fully synchronous and available in multiple configurations varying in bus widths, set of finite fields supported and throughput. |
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Key Features |
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Small size: RSA1-E starts from less than 10K ASIC gates (intermediate result storage memory required; size depends on the core configuration) |
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Implements the computationally demanding parts of RSA public key cryptography for long life battery powered applications |
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Support for RSA binary fields of configurable bit sizes up to 2048 |
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Microprocessor-friendly interface |
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Test bench provided |
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Applications |
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Secure communications systems |
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RFID |
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Implantable medical devices |
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Digital Rights Management (DRM) for battery powered electronics |
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Digital Signature using Reversible Public Key (rDSA) standard ANSI X9.31 |
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Digital Signature Standard (DSS) FIPS-186 |
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PKCS RSA cryptography per RFC 2347 |
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