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| HDCP 2.0 Encryption Suite |
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General Description
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol.
The hardware components are fully synchronous and available as Verilog source. The software components are available in C language. |
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Key Features
Support for HDCP 2.0
Support for all HDCP configurations:
- HDCP Transmitter (-TX)
- HDCP Receiver (-RX)
- HDCP Repeater (-RPT)
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Implementation of the HDCP Authentication protocol:
- Authentication and Key Exchange (AKE)
- With Key Derivation
- Locality Check
- Session Key Exchange (SKE)
- Authentication with Repeaters
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Data encryption:
- Utilizes HDCP Cipher (AES-128-CTR)
- Includes the Link Synchronization
- Transmitter and Receiver utilize the counter information in the PES Private Data
- FIFO-like flow-through interface with flexible bit width; simple integration into the datapath.
- Microprocessor-friendly interface for programmable I/O is optional
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Applications
- Digital rights management (DRM)
- HDCP 2.0 implementations for generic wired and wireless interfaces
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Components
- HDCP software written in C (CPU subsystem is not included)
- Hardware accelerators
- AES1-CTR-HDCP: AES encryption/decryption capable of handling the PES streams
- RSA2: An RSA hardware accelerator (optional, high-end CPUs can use the software
implementation)
- TRNG1: A true random number generator (optional, if entropy bits are available in the design, a
software implementation can be used)
- SHA2-256: A Sha-256 hash accelerator (optional, most CPUs can use the software
implementation)
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Function Description
The HDCPS suite includes hardware and software components. Supplied components are highlighted on the
diagram below.
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Implementation Details
| Component |
ASIC, NAND gates |
Dedicated memory, bits |
CPU code size, bytes |
CPU data size, bytes |
NVRAM, bytes |
HDCP protocol |
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8KB |
4KB |
6KB |
AES1-8CTR-HDCP |
10K |
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RSA2 |
12K |
18K or 6K (note 1) |
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SHA2-256 |
18K |
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TRNG1 |
9K |
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RSA software |
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5KB |
3KB |
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TRNG software |
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1.5KB |
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SHA-256 software |
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2KB |
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Notes:
1. RSA2 can either have 3072-bit support, or just 1024. In the latter case, the dedicated memory requirements are 3x times lower,
yet RSA-3072 will be implemented in software (add the software modules size to the RAM/ROM requirements) |
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