Implementation of the new WLAN security standard (802.16e) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and message authentication. The CCM6 AES core is tuned for 802.16e applications. The core contains the base AES core AES1 and is available for immediate licensing.
The design is fully synchronous and available in both source and netlist form.
Symbol
Key Features
Small size:
from 8,900 ASIC gates at 802.16 data speeds
Completely self-contained: does not require external memory
Includes encryption, decryption, key expansion and data interface
Support for Counter Mode Encryption (CTR) operation and CCM extensions (Counter Mode with CBC MAC)
Support for CMAC and MBS-CTR modes
Flow-through design with header parsing
Test bench provided
LRW-AES Applications
Storage encryption
Pin Description
Name
Type
Description
CLK
Input
Core clock signal
RESET
Input
Core reset signal
MODE
Input
Operation mode of the core
START
Input
HIGH starting input data processing
READ
Output
Read request for the input data byte
DATA_VALID
Input
HIGH when valid data byte present on the input
WRITE
output
Write to the output interface
OUT_READY
Input
HIGH when output interface is ready to accept data byte
The core is designed for flow-through operation, with byte-wide input and output interfaces. CCM6 key precedes the frame in the flow of data. CCM6 supports CCM and MBS-CTR modes for both encryption and decryption, and CMAC authentication.
Implementation Results
Area Utilization and Performance
Representative area/resources figures are shown below.
Technology
Area / Resources
Frequency
Max Throughput
TSMC 0.13 µ G
24,763 gates
150 MHz
960 Mbps
TSMC 0.13 µ G
11,861 gates
250 MHz
800 Mbps
Export Permits
US Bureau of Industry and Security has assigned the export control classification number 5E002 to our AES core. The core is eligible for the license exception ENC under section 740.17(A) and (B)(1) of the export administration regulations. See the licensing basics page,
for links to US government sites and more details.
Deliverables
HDL Source Licenses
Synthesizable Verilog RTL source code
Test bench (self-checking)
vectors for testbenches
Expected results
User Documentation
Netlist Licenses
Post-synthesis EDIF
Testbench (self-checking)
vectors for testbenches
Expected results
Contact Information
IP Cores, Inc.
3731 Middlefield Rd.
Palo Alto, CA 94303, USA
Phone: +1 (650) 815-7996